Mail Archives: djgpp/1997/02/02/07:42:17
>> This sounds a little fishy to me, especially considering the code sizes
>> of the two programs are (when stripped) roughly equivalent. Is there any
>> reason that Gcc might skip the mul's in the shift&add one as an
>> optimization? (ie looking ahead and seeing the value isn't used so not
>> doing the calculation, or something?)
if you compile with the -S switch you could look at the code and make sure
it's producing what you want it to :)
just for the record, you can get a shift down to one cycle on a pentium
by using the shrl $value,%%register version. however it only pairs in the u
pipe, so a few of these will cause problems. mul and imul are really awful
taking a minimum of 9 cycles and not pairable at all. so your shifts should
win by a factor of about 9 here.
regards,
nik
--
Graham Tootell
nikki AT gameboutique DOT com
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