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Message-ID: | <1329080650.10915.5.camel@localhost> |
Subject: | Re: [geda-help] polygon shaped hole in solder mask |
From: | Peter Clifton <peter DOT clifton AT clifton-electronics DOT co DOT uk> |
To: | geda-help AT delorie DOT com |
Cc: | Colin D Bennett <colin AT gibibit DOT com> |
Date: | Sun, 12 Feb 2012 21:04:10 +0000 |
In-Reply-To: | <20120208233501.GF10994@geminiman> |
References: | <20120208071321 DOT GA14573 AT geminiman> |
<20120208091929 DOT 5159a6a5 AT svelte> <20120208233501 DOT GF10994 AT geminiman> | |
Organization: | Clifton Electronics |
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On Wed, 2012-02-08 at 17:35 -0600, mog wrote: > > > > If it is made with polygons, you are out of luck. I think. It's > > really too bad that pcb footprints are so restricted. > > > Like I said before it is made with polygons attached is the image in pcb format > as well as some open hardware logos i wanted to do the same thing with. As a kludge, put them on a copper separate layer, then append the gerber output for that layer to the soldermask gerber output. I "think" that will work. The aperture definitions for the different layers may not match, so just paste the polygon output after the headers. A final gotcha.. you won't want the pads from vias on your temporary layer, so you will have to call it either "route" or "outline" so PCB treats it as non-copper. You may need to rename the real "outline" layer before you export the logo layer, as I vaguely recall a conflict where PCB might get the wrong outline layer. (And rename the logo layer back for exporting the normal gerbers). I'm sorry there isn't an easier way to do this at the moment, this is a limitation of our present board and footprint file format. -- Peter Clifton <peter DOT clifton AT clifton-electronics DOT co DOT uk> Clifton Electronics
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