Mail Archives: geda-user/2014/07/23/17:50:38
On 07/23/2014 01:35 PM, John Griessen wrote:
> On 07/23/2014 01:46 PM, Evan Foss wrote:
>> I should think the subcircuit really just
>> needs some special tag on it's page that will indicate the Rx, Cx and
>> other reference designators will be altered after netlisting &
>> tessellation on the layout.
>
>
> In chips or big circuits with repeated elements the burden would be huge.
> Flat netlisting would grind to a halt for circuits with 40 elements
> repeated 64 times
> in one area, and 50 other cases of the same in the whole circuit. That
> example
> is 128K circuit elements used to make shift registers, and not even
> estimating RAM
> and ROM to use.
> But printed electronics that goes on the door of a washing machine could
> get that way easily.
> There would be plenty of ROM to encode your programs, and some RAM to
> run out of,
> all made in a slow large CMOS type of organic or nano inorganic
> semiconductor set of materials
> printed on the surface of the door panel so it can dissipate heat and
> have low low leakage
> and low low power consumption, and slow boring performance to go with
> that. But fine for
> motor control and a UI, and there would be a few chips added to
> transition to the faster networking
> circuit world around that slow washing machine bot. The circuit area
> would look like
> all wires and flat patches of capacitance and transistors with no 3D
> components anywhere except a few
> at the edge with an ethernet cable or wireless going out, or at the edge
> with the motor control
> where there are a few special power transistors attached..
>
>
> Think about making a 64 bit ALU...it would get super tedious to have
> unique ref des's for
> all those transistors. You really just need to know they come from
> "such and such"
> module that has been simulated plenty and can be used with up to so much
> length of wires away.
> Each placement of a module does not need its own unique identifier for
> module's R1, R2, C1.
> They can all be called R1, R2, C1, and exist in different instances of
> the identical
> module, where the instances are kept track of in the netlist and by gschem.
>
>
> There would be no components needing a ref des anyway in an array
> repetitive circuit case, since
> the circuit elements would be completed from primitives like in chip
> mask making, not by an assembly step needing a ref des.
>
The last time I did any gate-array design, we were still building
mainframe CPU's with ECL. But... back then Amdahl had one of the most
high-productivity schematic editors I have ever used. And it ran on a
52-line by 80 column text terminal. It was productive for two reason:
1) Component stacking with powerful bus rippers. I could specify a
32-bit latch with 4 parity bits (36 bits all together) by instantiating
a single symbol, and putting in a stack-count of 36. It appeared on
plotted (micro-fische vector art) schematic prints as a single block,
with a "36" displayed by breaking the bottom line of the ANSI-compliant
schematic symbol and placing the text there. I'll try some ascii-art:
+----+
| |
| +--OUT[0-31;P0-P3]
| |
+-36-+
sorta like that, only prettier. Then, the signal name could be:
OUT[0-31;P0-p3] which would rip latch zero to bit 0, latch 1 to bit 1,
etc. You could specify swizzles: [0-30:2,1-31:2] meant count by two's:
[0,2,4,6...1,3,5...]
The refdes for a component stack was something like U31.7, the stack
item number being after the dot.
And your point about refdes on individual transistors is well-taken.
The Amdahl had hierarchical refdes's U3/U7.3/U4.4 (except they were
meaningful names, not "U", because we'd have gone loony tracking a CPU
full of stuff otherwise). And at any level, the system could generate
instance names like I$007 for instance names that you didn't care about;
but of course the rest of the CAD system wanted a unique instance name
on every little thing.
2) The second reason for productivity is that the attributes were a
completely separate database, and was under independent revision
control. Attributes were joined (very much a database join) to
instances by refdes. So you could have one schematic, and experiment
with different versions of the attached attributes very easily (which
was important for trying various place/route strategies in that day and
age.)
-dave
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