Bitfields for Intel 82443BX/EX/LX Error Command Register: Bit(s) Description ) 7 enable SERR# on AGP non-snoopable access outside graphics aperture 6 enable SERR# on invalid AGP DRAM access (82443BX) enable SERR# on AGP Non-snoopable access to location outside main DRAM and arpeture rangles (82443EX/LX) 5 enable SERR# on access to invalid Graphics Aperture Translation Table 4 enable SERR# on receiving Target Abort 3 enable SERR# when Thermal DRAM Throttling detected (82443BX) enable SERR# on PCI Parity Error (82443EX/LX) ---82443BX--- 2 SERR# mode =0 asserted for one PCI clock =1 level mode signal (for systems that connect SERR# to EXTSMI#) 1 enable SERR# on receiving multi-bit Parity/ECC error 0 enable SERR# on receiving single-bit (corrected) ECC error ---82443EX/LX--- 2-0 reserved Note: bits 1 and 0 must be clear on systems not supporting ECC SeeAlso: #01155,#01157,#01142,#01129